Assistant Professor of Electrical and Computer Engineering
Office: Haggerty Hall 216
Phone: (414) 288-5720
Fax: (414) 288-5579
Ph.D., 2004, Electrical and Computer Engineering, University of Minnesota
M.S., 1998, Signal Processing, Technical University of Iasi
B.S., 1996, Microelectronics, Technical University of Iasi
H. Sajjadi Kia and C. Ababei, A new reliability evaluation methodology with application to lifetime oriented circuit design, IEEE Trans. on Device and Materials Reliability, vol. 13, no. 1, pp. 192-202, March 2013.
A.Y. Yamamoto and C. Ababei, Unified system level reliability evaluation methodology for multiprocessor systems-on-chip, IEEE International Green Computing Conference, Lighter-than-Green Dependable Multicore Architectures Workshop, San Jose, CA, June 2012.
C. Ababei, H. Sajjadi Kia, O.P. Yadav, and J. Hu, Energy and reliability oriented mapping for regular Networks-on-Chip, ACM/IEEE Int. Symposium on Networks-on-Chip (NOCS), Pittsburg PA, May 2011.
C. Ababei and R. Kavasseri, Efficient network reconfiguration using minimum cost maximum flow based branch exchanges and random walks based loss estimations, IEEE Trans. on Power Systems, vol. 26, no. 1, pp. 30-37, Feb. 2011.